GTech Booster

Finally just to show you that everything you could possibly want can be easily included in this simple processor architecture consider how you might implement a “jump to xxxx” instruction. Normally the next instruction to be executed is in the next sequential memory location but a jump makes the instruction at xxxx the next one. How can this be achieved? Easy! Just make the PC register correspond to register address 00 (rather than general purpose register D as suggested earlier). Now consider what  “load PC from address aaaa” does. It loads the PC register with the value stored in “aaaa” and so makes this the next instruction. Not quite what was…

Continue reading... The Computer CPU – Jumps

The op-code isn’t just any old number; it has a structure. In our example the first two bits of the op-code act as a mini address that selects which register the operation is going to use – 11  A register, 10  B register, 01  C register and 00  D register. The top two bits give the operation to be performed on the register that is selected – e.g. 10 = load the register, 11 = add to the value already in the register     and so on. You can see that there is nothing magic in the instruction decoder. The lower two bits are fed into a set of And/Or gates…

Continue reading... The Computer CPU – Op-code

As well as the PC register, a processor also has an instruction register which is used to store the current program instruction. A system clock generator provides pulses that synchronize what happens in the entire machine – it doesn’t have to be this way but non-clock synchronized machines are much more difficult to build and, by for the same reason, to describe! What happens is that the PC register contains the address of the next instruction and on the first clock pulse this address is placed on the address bus and a read cycle transfers the instruction into the instruction register. Notice that we are already using “little human” descriptions of…

Continue reading... The Computer CPU – The Fetch cycle